Commit 3b91558e authored by Leonard Kugis's avatar Leonard Kugis

Initial commit

parents
[Dolphin]
Timestamp=2019,12,14,14,20,31
Version=4
[Settings]
HiddenFilesShown=true
# Created by https://www.gitignore.io/api/kicad
# Edit at https://www.gitignore.io/?templates=kicad
### KiCad ###
# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
### KiCad Patch ###
escue-backup/
*.tsv
bom/
# Gerber export output
out/
# End of https://www.gitignore.io/api/kicad
(kicad_pcb (version 4) (host kicad "dummy file") )
update=22/05/2015 07:44:53
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
EESchema Schematic File Version 2
EELAYER 25 0
EELAYER END
$EndSCHEMATC
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