diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index af818a21587ceacf383d575908d008dd69ddd03c..5abcfc016c4779bc3577e4c97ff1bbff014dff75 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -518,7 +518,7 @@ void __init at91_gpio_irq_setup(void)
 		__raw_writel(~0, this->regbase + PIO_IDR);
 
 		for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
-			lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class);
+			irq_set_lockdep_class(pin, &gpio_lock_class);
 
 			/*
 			 * Can use the "simple" and not "edge" handler since it's
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index 094e61a59b1f9d93f981295e2da0d5fe93a452eb..8ab2131f41d44d652fbda983b802ca2b65dae11b 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -340,7 +340,7 @@ static int __init tegra_gpio_init(void)
 	for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
 		bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))];
 
-		lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class);
+		irq_set_lockdep_class(i, &gpio_lock_class);
 		set_irq_chip_data(i, bank);
 		set_irq_chip(i, &tegra_gpio_irq_chip);
 		set_irq_handler(i, handle_simple_irq);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 971d186369423c7eacb03e580a74714ad35e6f26..08af18883e26c927c8da5f4abb81f1dc5e017837 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1672,9 +1672,7 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
 
 	for (j = bank->virtual_irq_start;
 		     j < bank->virtual_irq_start + bank_width; j++) {
-		struct irq_desc *d = irq_to_desc(j);
-
-		lockdep_set_class(&d->lock, &gpio_lock_class);
+		irq_set_lockdep_class(j, &gpio_lock_class);
 		set_irq_chip_data(j, bank);
 		if (bank_is_mpuio(bank))
 			set_irq_chip(j, &mpuio_irq_chip);