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  • Christian Dietrich Christian Dietrich ccd5802
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  • Yannick Loeck Yannick Loeck cyl4616
4 authors
  1. Dec 15, 2006
  3. Dec 14, 2006
  5. Dec 13, 2006
    • Russell King's avatar
      [ARM] Merge AT91 and devel branches · e9ccb799
      Russell King authored 
      
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      e9ccb799
    • Kristoffer Ericson's avatar
      [ARM] 4017/1: [Jornada7xx] - Updating Jornada720.c · 408966b8
      Kristoffer Ericson authored 
      
* HP Jornada 720 uses epson 1356 chip for graphics. This chip is compatible with s1d13xxxfb driver.

* HP Jornada 720 uses a Microprocessor Control Unit to talk to various
hardware. We add it as a platform device in jornada720_init()

* We provide pm_suspend() to avoid unresolved symbols in apm.o. We are
unable to truly suspend now, hence the stub.

* Speaker/microphone enabling got removed because it will be placed in the alsa driver.

Signed-off-by: Filip Zyzniewski <(address hidden)>
Signed-off-by: Kristoffer Ericson <(address hidden)>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      408966b8
    • Tony Luck's avatar
      [IA64] Move sg_dma_{len,address} from pci.h to scatterlist.h · 7806ca89
      Tony Luck authored 
      
IA64 is in a tiny minority providing these defines in pci.h.
Almost everyone else has them in scatterlist.h

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      7806ca89
    • Pavel Pisa's avatar
      [ARM] 3992/1: i.MX/MX1 CPU Frequency scaling support · 3c8cd0cc
      Pavel Pisa authored 
      
Support to change MX1 CPU frequency at runtime.
Tested on PiKRON's PiMX1 board and seems to be fully
stable up to 200 MHz end even as low as 8 MHz.

Signed-off-by: default avatarPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      3c8cd0cc
    • Russell King's avatar
      [ARM] Provide a method to alter the control register · 47fd7052
      Russell King authored 
      
i.MX needs to tweak the control register to support CPU frequency
scaling.  Rather than have folk blindly try and change the control
register by writing to it and then wondering why it doesn't work,
provide a method (which is safe for UP only, and therefore only
available for UP) to achieve this.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      47fd7052
    • Nicolas Pitre's avatar
      [ARM] 4016/1: prefetch macro is wrong wrt gcc's "delete-null-pointer-checks" · 02828845
      Nicolas Pitre authored 
       optimization

The gcc manual says:

|`-fdelete-null-pointer-checks'
|     Use global dataflow analysis to identify and eliminate useless
|     checks for null pointers.  The compiler assumes that dereferencing
|     a null pointer would have halted the program.  If a pointer is
|     checked after it has already been dereferenced, it cannot be null.
|     Enabled at levels `-O2', `-O3', `-Os'.

Now the problem can be seen with this test case:

#include <linux/prefetch.h>
extern void bar(char *x);
void foo(char *x)
{
	prefetch(x);
	if (x)
		bar(x);
}

Because the constraint to the inline asm used in the prefetch() macro is
a memory operand, gcc assumes that the asm code does dereference the
pointer and the delete-null-pointer-checks optimization kicks in.
Inspection of generated assembly for the above example shows that bar()
is indeed called unconditionally without any test on the value of x.

Of course in the prefetch case there is no real dereference and it
cannot be assumed that a null pointer would have been caught at that
point. This causes kernel oopses with constructs like
hlist_for_each_entry() where the list's 'next' content is prefetched
before the pointer is tested against NULL, and only when gcc feels like
applying this optimization which doesn't happen all the time with more
complex code.

It appears that the way to prevent delete-null-pointer-checks
optimization to occur in this case is to make prefetch() into a static
inline function instead of a macro. At least this is what is done on
x86_64 where a similar inline asm memory operand is used (I presume they
would have seen the same problem if it didn't work) and resulting code
for the above example confirms that.

An alternative would consist of replacing the memory operand by a
register operand containing the pointer, and use the addressing mode
explicitly in the asm template. But that would be less optimal than an
offsettable memory reference.

Signed-off-by: default avatarNicolas Pitre <nico@cam.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      02828845
    • Russell King's avatar
      [PATCH] Add missing KORENIX PCI ID's · aef6fba4
      Russell King authored 
      
Oops, sorry about that.

Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      aef6fba4
    • Ralf Baechle's avatar
      [PATCH] Optimize D-cache alias handling on fork · ec8c0446
      Ralf Baechle authored 
      
Virtually index, physically tagged cache architectures can get away
without cache flushing when forking.  This patch adds a new cache
flushing function flush_cache_dup_mm(struct mm_struct *) which for the
moment I've implemented to do the same thing on all architectures
except on MIPS where it's a no-op.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      ec8c0446
    • Atsushi Nemoto's avatar
      [PATCH] MIPS: Fix COW D-cache aliasing on fork · bcd02280
      Atsushi Nemoto authored 
      
Provide a custom copy_user_highpage() to deal with aliasing issues on
MIPS.  It uses kmap_coherent() to map an user page for kernel with same
color.  Rewrite copy_to_user_page() and copy_from_user_page() with the
new interfaces to avoid extra cache flushing.

The main part of this patch was originally written by Ralf Baechle;
Atushi Nemoto did the the debugging.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      bcd02280
    • Atsushi Nemoto's avatar
      [PATCH] Pass vma argument to copy_user_highpage(). · 9de455b2
      Atsushi Nemoto authored 
      
To allow a more effective copy_user_highpage() on certain architectures,
a vma argument is added to the function and cow_user_page() allowing
the implementation of these functions to check for the VM_EXEC bit.

The main part of this patch was originally written by Ralf Baechle;
Atushi Nemoto did the the debugging.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      9de455b2
    • Atsushi Nemoto's avatar
      [PATCH] Fix COW D-cache aliasing on fork · 77fff4ae
      Atsushi Nemoto authored 
      
Problem:

1. There is a process containing two thread (T1 and T2).  The
   thread T1 calls fork().  Then dup_mmap() function called on T1 context.

static inline int dup_mmap(struct mm_struct *mm, struct mm_struct *oldmm)
	...
	flush_cache_mm(current->mm);
	...	/* A */
	(write-protect all Copy-On-Write pages)
	...	/* B */
	flush_tlb_mm(current->mm);
	...

2. When preemption happens between A and B (or on SMP kernel), the
   thread T2 can run and modify data on COW pages without page fault
   (modified data will stay in cache).

3. Some time after fork() completed, the thread T2 may cause a page
   fault by write-protect on a COW page.

4. Then data of the COW page will be copied to newly allocated
   physical page (copy_cow_page()).  It reads data via kernel mapping.
   The kernel mapping can have different 'color' with user space
   mapping of the thread T2 (dcache aliasing).  Therefore
   copy_cow_page() will copy stale data.  Then the modified data in
   cache will be lost.

In order to allow architecture code to deal with this problem allow
architecture code to override copy_user_highpage() by defining
__HAVE_ARCH_COPY_USER_HIGHPAGE in <asm/page.h>.

The main part of this patch was originally written by Ralf Baechle;
Atushi Nemoto did the the debugging.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      77fff4ae